The Number
TSMC’s revenue for the three months ending September 30, 2026, was NT$1.540 trillion (approximately $46.71 billion at prevailing exchange rates), a 50.5% increase over Q3 2025 [Established: TSMC monthly revenue releases, consolidated into Q3 total; TrendForce / Business Standard, October 2026]. This is above analyst consensus estimates heading into the period, which centred around $44–$45 billion [Established: Bloomberg consensus, cited in Business Standard, October 2026].
The sequential growth versus Q2 2026 was approximately 12.8%. Both the year-on-year and sequential figures exceed TSMC’s own guidance range issued in July, which projected Q3 revenue of $43.0–$44.0 billion [Established: TSMC Q2 2026 earnings call guidance, July 2026]. TSMC does not attribute revenue by customer in its monthly releases, but the high-performance computing segment — which includes AI training and inference chip orders from Nvidia, AMD, and hyperscalers — is the acknowledged primary driver of the outperformance [Established: TSMC segment disclosure pattern, 2025–2026].
What the Number Confirms
The significance of the Q3 print is not the absolute revenue figure. It is the confirmation that AI-driven semiconductor demand has now produced a measurable industrial earnings cycle, not merely equity market valuation re-rating [Assessed: Navigator desk]. The distinction matters. From 2023 through early 2025, the primary market signal of the “AI super-cycle” was multiple expansion: Nvidia’s P/E rising, TSMC’s enterprise value growing. Actual semiconductor volumes and the revenue of the foundry underpinning the entire supply chain had not yet confirmed the narrative at the industrial level.
Q3 2026 provides that confirmation at a scale that is not marginal. A 50.5% year-on-year increase in foundry revenue — across a product mix heavily weighted toward advanced 3nm and 5nm nodes — means physical silicon production has scaled at a rate consistent with the demand projections made by hyperscale buyers in 2023 and 2024 [Assessed: TrendForce industry data, Navigator desk synthesis]. The capital expenditure commitments made during those years are now appearing as manufactured output [Established pattern].
The Advanced Node Composition
TSMC’s revenue breakdown by technology node has shifted materially since 2024. Advanced nodes (3nm and below, plus 5nm) now account for an estimated 53–58% of total wafer revenue [Assessed: extrapolated from TSMC segment disclosures and TrendForce node-mix estimates]. N3 (3nm class) in particular has ramped faster than the N5 (5nm) ramp in 2021, driven by both Apple’s M-series and A-series volume and by Nvidia’s Blackwell architecture production ramp [Established: public procurement and product announcements from Apple and Nvidia; TSMC technology roadmap].
The gross margin implications of this node mix are significant. Advanced nodes carry higher average selling prices but also higher initial depreciation loads as capital equipment is amortised. TSMC guided gross margin of approximately 53–55% for Q3; the revenue beat likely implies a gross margin at the upper end or marginally above that band [Assessed]. Full quarterly gross margin figures will be confirmed at the October 17 earnings call [Established: TSMC investor relations calendar].
Where the Bottleneck Migrates
The foundry capacity constraint that defined 2022–2023 has largely resolved for mature nodes (28nm and above). The current bottleneck in the AI supply chain has migrated upstream to advanced packaging, specifically CoWoS (Chip on Wafer on Substrate) technology used to assemble HBM memory and GPU compute dies into the multi-chip modules required for AI training clusters [Established: TSMC technical disclosures; Nikkei Asia reporting on CoWoS capacity, 2025–2026].
CoWoS capacity expansion requires different capital equipment and longer lead times than wafer fabrication. TSMC has committed to tripling CoWoS capacity by end of 2026 from its 2024 baseline; whether this target has been met, and at what yield, is a question the October 17 earnings call will partially but not fully address [Assessed: public commitments versus actual ramp disclosures will differ; Navigator desk].
The secondary bottleneck is HBM3e (High Bandwidth Memory Generation 3e) supply from SK Hynix and Samsung, which is produced independently of TSMC but must co-arrive with the GPU die for packaging [Established: SK Hynix product disclosures]. Capacity constraints in HBM, rather than in TSMC wafer production, are the reported limiting factor for Nvidia’s Blackwell GB200 cluster shipments in Q4 2026 [Assessed: industry channel checks reported by TrendForce, October 2026]. This means TSMC’s Q4 revenue is bounded not by its own output but by the pace at which its packaging line can receive HBM from third-party memory suppliers [Assessed].
The Geopolitical Dimension
TSMC’s Arizona Fab 21 Phase 1, manufacturing N4 (4nm class) process chips, is in volume production as of Q3 2026 [Established: TSMC announcement, August 2026]. Phase 2, targeting N2 (2nm class), remains on schedule for 2028. The Arizona production volume is not material to consolidated revenue — it is a fraction of Taiwan’s output — but its operational status removes a key uncertainty from the TSMC risk profile: whether advanced node manufacturing could be established in US territory within the decade [Established: CHIPS Act programme context].
The Taiwan-strait risk premium in TSMC’s valuation has compressed since mid-2025 as Arizona production was confirmed and as US-Taiwan semiconductor supply chain coordination deepened [Assessed: valuation analyst commentary, Seeking Alpha / Bloomberg consensus]. Whether this compression is analytically justified — given that Arizona Fab 21 produces less than 4% of TSMC’s advanced-node output — is a valuation question the Navigator leaves open [Speculative: Navigator desk].
Q4 2026 guidance will be the focal point of the October 17 call. Consensus heading in anticipates approximately $49–$51 billion, which would represent a sixth consecutive quarterly revenue record [Assessed: Bloomberg consensus, Navigator desk extrapolation]. If the HBM supply bottleneck has been resolved faster than expected, the print could exceed $52 billion. If it persists into December, Q4 revenue lands at the lower bound of the consensus range [Speculative: Navigator desk scenario analysis].